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1
SEU and Soft Error Rate Measurements - Xilinx
https://docs.xilinx.com/r/en-US/ug116/SEU-and-Soft-Error-Rate-Measurements
The DVF for a typical design is 5% (one in 20 upsets, on average, cause a functional soft error). In the worst case, the DVF is never larger than one in ten, or ...
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https://docs.xilinx.com/r/en-US/ug116/SEU-and-Soft-Error-Rate-Measurements
The DVF for a typical design is 5% (one in 20 upsets, on average, cause a functional soft error). In the worst case, the DVF is never larger than one in ten, or ...
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2
Single-event upset - Wikipedia
https://en.wikipedia.org/wiki/Single-event_upset
A single-event upset (SEU), also known as a single-event error (SEE), is a change of state caused by one single ionizing particle (ions, electrons, photons.
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https://en.wikipedia.org/wiki/Single-event_upset
A single-event upset (SEU), also known as a single-event error (SEE), is a change of state caused by one single ionizing particle (ions, electrons, photons.
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3
Soft error rate FAQs | Quality & reliability | TI.com
https://www.ti.com/support-quality/faqs/soft-error-rate-faqs.html
Find answers to questions about soft error rates, including possible causes, ... Soft errors are also referred to as a single-event upset (SEU) which better ...
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https://www.ti.com/support-quality/faqs/soft-error-rate-faqs.html
Find answers to questions about soft error rates, including possible causes, ... Soft errors are also referred to as a single-event upset (SEU) which better ...
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4
SEU error rates in advanced digital CMOS - IEEE Xplore
https://ieeexplore.ieee.org/document/316521
Single-event error rate analysis of radiation-hardcncd CMOS mcmory parts is prescntcd. The statistical distribution on device processing parameters is shown ...
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https://ieeexplore.ieee.org/document/316521
Single-event error rate analysis of radiation-hardcncd CMOS mcmory parts is prescntcd. The statistical distribution on device processing parameters is shown ...
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5
Estimating the SEU failure rate of designs implemented in ...
https://www.sciencedirect.com/science/article/pii/S0026271417303943
The errors associated with SEU are commonly referred to as SER since they usually do not cause system destruction and they can be recovered by rewriting the ...
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https://www.sciencedirect.com/science/article/pii/S0026271417303943
The errors associated with SEU are commonly referred to as SER since they usually do not cause system destruction and they can be recovered by rewriting the ...
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6
Single Event Upset Error Rates | SpringerLink
https://link.springer.com/chapter/10.1007/978-1-4615-6043-2_5
This chapter together with Chapter 8 provides the major share of the discussion on the practical aspects of single event upset (SEU).
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https://link.springer.com/chapter/10.1007/978-1-4615-6043-2_5
This chapter together with Chapter 8 provides the major share of the discussion on the practical aspects of single event upset (SEU).
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7
A METHOD TO COMPUTE SEU FAULT PROBABILITIES IN ...
https://ntrs.nasa.gov/api/citations/19960022640/downloads/19960022640.pdf
the fault (mishap) probability for a ... radiation is a significant cause of errors in ... probability of SEU error accumulation can be minimized.
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https://ntrs.nasa.gov/api/citations/19960022640/downloads/19960022640.pdf
the fault (mishap) probability for a ... radiation is a significant cause of errors in ... probability of SEU error accumulation can be minimized.
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8
Neutron-Induced Single Event Upset (SEU) FAQ - Microsemi
https://www.microsemi.com/document-portal/doc_view/130760-neutron-seu-faq
What are configuration memory upsets? Although the physical phenomenon is often referred to as a soft error or as the soft error rate (SER), strictly speaking ...
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https://www.microsemi.com/document-portal/doc_view/130760-neutron-seu-faq
What are configuration memory upsets? Although the physical phenomenon is often referred to as a soft error or as the soft error rate (SER), strictly speaking ...
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9
FPGA-based Bit-Error-Rate Tester for SEU-hardened Optical ...
https://inspirehep.net/literature/1654227
To cope with radiation induced single-event upsets, the physical layer protocol will include Forward Error Correction (FEC). Bit-Error-Rate (BER) testing is ...
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https://inspirehep.net/literature/1654227
To cope with radiation induced single-event upsets, the physical layer protocol will include Forward Error Correction (FEC). Bit-Error-Rate (BER) testing is ...
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10
Single Event Upsets - Intel
https://www.intel.com/content/www/us/en/support/programmable/support-resources/quality/seu.html
Unavoidable atmospheric neutrons remain the primary cause for SEU effects today. Soft errors are random and happen according to a probability related to ...
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https://www.intel.com/content/www/us/en/support/programmable/support-resources/quality/seu.html
Unavoidable atmospheric neutrons remain the primary cause for SEU effects today. Soft errors are random and happen according to a probability related to ...
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11
SEU error rate (SER) analysis of ISCAS85 benchmark circuits.
https://www.researchgate.net/figure/SEU-error-rate-SER-analysis-of-ISCAS85-benchmark-circuits_tbl1_221294883
SEU error rate for the structure with W layer computed using MRED and a traditional RPP method. The inclusion of indirect ionization processes in MRED increases ...
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https://www.researchgate.net/figure/SEU-error-rate-SER-analysis-of-ISCAS85-benchmark-circuits_tbl1_221294883
SEU error rate for the structure with W layer computed using MRED and a traditional RPP method. The inclusion of indirect ionization processes in MRED increases ...
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12
Probabilistic Soft Error Rate Estimation from Statistical SEU ...
https://www.semanticscholar.org/paper/Probabilistic-Soft-Error-Rate-Estimation-from-SEU-Wang-Agrawal/643434bb07c17d70b33fb4e96da1d7fc55e81b0b
Environmental causes of SEU include cosmic radiation and high-energy particles. Our neutron induced soft error rate (SER) estimation method propagates ...
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https://www.semanticscholar.org/paper/Probabilistic-Soft-Error-Rate-Estimation-from-SEU-Wang-Agrawal/643434bb07c17d70b33fb4e96da1d7fc55e81b0b
Environmental causes of SEU include cosmic radiation and high-energy particles. Our neutron induced soft error rate (SER) estimation method propagates ...
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13
Soft Error Rate (SER) Testing Solutions - IROC Technologies
https://www.iroctech.com/solutions/testing-solutions/
› solutions › testing-solutions
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https://www.iroctech.com/solutions/testing-solutions/
› solutions › testing-solutions
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14
A software solution to estimate the SEU-induced soft error rate ...
http://iopscience.iop.org/article/10.1088/1674-4926/32/5/055008
A software solution to estimate the SEU-induced soft error rate for systems implemented on SRAM-based FPGAs ... 1 citation on Dimensions. 1 Total citation.
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http://iopscience.iop.org/article/10.1088/1674-4926/32/5/055008
A software solution to estimate the SEU-induced soft error rate for systems implemented on SRAM-based FPGAs ... 1 citation on Dimensions. 1 Total citation.
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15
SEU error rates in advanced digital CMOS|INIS
https://inis.iaea.org/search/search.aspx?orig_q=RN:27008827
Space-based electronics is exposed to cosmic radiations that result in bit reversal errors or Single Event Upsets. Those errors are generally taken into ...
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https://inis.iaea.org/search/search.aspx?orig_q=RN:27008827
Space-based electronics is exposed to cosmic radiations that result in bit reversal errors or Single Event Upsets. Those errors are generally taken into ...
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16
Single Event Upset (SEU) Report for MachXO2/MachXO3 ...
https://www.latticesemi.com/-/media/LatticeSemi/Documents/ApplicationNotes/PT2/FPGA-TN-02146-1-1-SEU-Report-MachXO2-XO3-XO3D.ashx?document_id=53176
2. Soft Error Rate Data for MachXO2/MachXO3/MachXO3D. FPGA Families. Table 2.1summarizes the SEU data collected for Lattice's 65 nm Flash ...
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https://www.latticesemi.com/-/media/LatticeSemi/Documents/ApplicationNotes/PT2/FPGA-TN-02146-1-1-SEU-Report-MachXO2-XO3-XO3D.ashx?document_id=53176
2. Soft Error Rate Data for MachXO2/MachXO3/MachXO3D. FPGA Families. Table 2.1summarizes the SEU data collected for Lattice's 65 nm Flash ...
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17
Radiation-induced Soft Errors: A Chip-level Modeling ...
https://www.nowpublishers.com/article/DownloadSummary/EDA-018
SEU. = N. ∑ device. (SERnominal × TVF × AVF). (1.1). Nominal soft error rates (SERnominal) refer to upset rates under static conditions, i.e., where signal ...
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https://www.nowpublishers.com/article/DownloadSummary/EDA-018
SEU. = N. ∑ device. (SERnominal × TVF × AVF). (1.1). Nominal soft error rates (SERnominal) refer to upset rates under static conditions, i.e., where signal ...
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18
The contribution of low-energy protons to the total on-orbit ...
https://www.osti.gov/servlets/purl/1326915
The large SEU cross sections observed from LEPs raised concerns that this new mechanism might significantly increase on-orbit error rates.
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https://www.osti.gov/servlets/purl/1326915
The large SEU cross sections observed from LEPs raised concerns that this new mechanism might significantly increase on-orbit error rates.
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19
Evaluation de la sensibilité face aux SEE et méthodologie ...
https://tel.archives-ouvertes.fr/tel-01690093/document
Soft Error Rate. SET. Single Event Transient. SEU. Single Event Upset. SFR. System Function Register. SMEM. Static Memory. SMP. Symmetric Multi-Processing.
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https://tel.archives-ouvertes.fr/tel-01690093/document
Soft Error Rate. SET. Single Event Transient. SEU. Single Event Upset. SFR. System Function Register. SMEM. Static Memory. SMP. Symmetric Multi-Processing.
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20
Help: Single event upsets - SPENVIS
https://www.spenvis.oma.be/help/background/creme/creme.html
Calculation of SEU rates from the direct ionisation of charged particles ... Pickel, J. C., and Blandford, J. T., Jr., Cosmic-Ray-Induced Errors in MOS ...
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https://www.spenvis.oma.be/help/background/creme/creme.html
Calculation of SEU rates from the direct ionisation of charged particles ... Pickel, J. C., and Blandford, J. T., Jr., Cosmic-Ray-Induced Errors in MOS ...
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21
A Generic Methodology to Compute Design Sensitivity to SEU ...
https://www.es.ele.tue.nl/~rjordans/downloads/mahsa2018dsd.pdf
Separate schema and test-bench for evaluating effects of SEU in various types of FPGA memory are proposed in which both the raw device error rate and the.
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https://www.es.ele.tue.nl/~rjordans/downloads/mahsa2018dsd.pdf
Separate schema and test-bench for evaluating effects of SEU in various types of FPGA memory are proposed in which both the raw device error rate and the.
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22
Single Event Upset: An Embedded Tutorial - Auburn University
https://www.eng.auburn.edu/~agrawvd/TALKS/wang-singleeventupset.pdf
“Single Event Upset (SEU): Radiation-induced er- rors in microelectronic circuits caused when ... Recent Soft Error Rate (SER) testing result of SRAM-based.
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https://www.eng.auburn.edu/~agrawvd/TALKS/wang-singleeventupset.pdf
“Single Event Upset (SEU): Radiation-induced er- rors in microelectronic circuits caused when ... Recent Soft Error Rate (SER) testing result of SRAM-based.
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23
Impact of Soft Errors on Large-Scale FPGA Cloud Computing
https://par.nsf.gov/servlets/purl/10110502
FPGA cloud computing; FPGA data centers; soft error rate, SER; single event upset, SEU; architectural vulnerability factor, AVF; fault.
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https://par.nsf.gov/servlets/purl/10110502
FPGA cloud computing; FPGA data centers; soft error rate, SER; single event upset, SEU; architectural vulnerability factor, AVF; fault.
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24
Space Radiation Effects on Electronics - Single Event Effects
https://spacetalos.com/news/space-radiation-effects-on-electronics-single-event-effects/
SEUs records during LEO missions such as PROBA-II and SAC-D observe an average error rate ranging from 0.1 to 1 SEU/day for commercial ...
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https://spacetalos.com/news/space-radiation-effects-on-electronics-single-event-effects/
SEUs records during LEO missions such as PROBA-II and SAC-D observe an average error rate ranging from 0.1 to 1 SEU/day for commercial ...
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25
Basic Mechanisms and Modeling of Single-Event Upset in ...
https://reliablemicrosystems.com/wp-content/uploads/2021/04/SEE-Mechanisms-Dodd-Massengill-rev-d12-m9.pdf
single-event upset (SEU) in dynamic and static random access memories (DRAM and SRAM) and ... authors at Intel found a significant error rate in DRAMs as.
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https://reliablemicrosystems.com/wp-content/uploads/2021/04/SEE-Mechanisms-Dodd-Massengill-rev-d12-m9.pdf
single-event upset (SEU) in dynamic and static random access memories (DRAM and SRAM) and ... authors at Intel found a significant error rate in DRAMs as.
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26
arXiv:2104.01908v1 [cs.AR] 5 Apr 2021
https://arxiv.org/pdf/2104.01908
Networks to Evaluate SEU Type Soft Error Effects ... tional Failure Rate (FFR), Single Event Upset (SEU), Single Event.
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https://arxiv.org/pdf/2104.01908
Networks to Evaluate SEU Type Soft Error Effects ... tional Failure Rate (FFR), Single Event Upset (SEU), Single Event.
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27
Characterization of Soft Errors Caused by Single Event Upsets ...
http://www1.cs.columbia.edu/~cs4823/handouts/karnik-soft-errors-DSC-04.pdf
There is a need to include the soft error rate (SER) as another design parameter. ... actively clocked circuit, an SEU on any node has a finite probability ...
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http://www1.cs.columbia.edu/~cs4823/handouts/karnik-soft-errors-DSC-04.pdf
There is a need to include the soft error rate (SER) as another design parameter. ... actively clocked circuit, an SEU on any node has a finite probability ...
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28
Towards Soft Errors - ICS, UCI
https://www.ics.uci.edu/~kyoungwl/forge/ft/survey/SERsurvey.pdf
Event Burnout), and soft errors like SEU (Single-Event Up- ... logic SER (Soft Error Rate) is of the same order of magni- tude for both neutrons and alpha ...
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https://www.ics.uci.edu/~kyoungwl/forge/ft/survey/SERsurvey.pdf
Event Burnout), and soft errors like SEU (Single-Event Up- ... logic SER (Soft Error Rate) is of the same order of magni- tude for both neutrons and alpha ...
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29
SEU Rate Calculation with GEANT4 (comparison ... - NASA/ADS
https://adsabs.harvard.edu/full/2004ESASP.536..243I
I. INTRODUCTION Even if it has been shown that sometimes the use of the standard prediction methods fails to correctly evaluate the error rates in space ...
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https://adsabs.harvard.edu/full/2004ESASP.536..243I
I. INTRODUCTION Even if it has been shown that sometimes the use of the standard prediction methods fails to correctly evaluate the error rates in space ...
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30
Terrestrial Cosmic Ray Induced Soft Errors and Large-Scale ...
https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=1562&context=spacegrant
explored how FPGA soft error rates scale with changes in ... Several possible SEU response approaches approaches can be taken.
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https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=1562&context=spacegrant
explored how FPGA soft error rates scale with changes in ... Several possible SEU response approaches approaches can be taken.
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31
Design and Analysis Methodologies to Reduce Soft Errors in ...
https://etd.ohiolink.edu/apexprod/rws_etd/send_file/send?accession=case1126207930&disposition=inline
They also discuss techniques to reduce SEU sensitivity. [Dai et al., 1999] discussed a modelling and simulation approach for α-particle soft error rate in ...
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https://etd.ohiolink.edu/apexprod/rws_etd/send_file/send?accession=case1126207930&disposition=inline
They also discuss techniques to reduce SEU sensitivity. [Dai et al., 1999] discussed a modelling and simulation approach for α-particle soft error rate in ...
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32
Single Event Effects Mitigation Techniques Report
https://www.faa.gov/aircraft/air_cert/design_approvals/air_software/media/TC-15-62.pdf
SEE error rate is acceptable with regard to the safety objectives. ... Some examples of these types of effects are Single Event Upsets (SEU), Multiple Bit ...
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https://www.faa.gov/aircraft/air_cert/design_approvals/air_software/media/TC-15-62.pdf
SEE error rate is acceptable with regard to the safety objectives. ... Some examples of these types of effects are Single Event Upsets (SEU), Multiple Bit ...
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33
DftC . - DTIC
https://apps.dtic.mil/sti/pdfs/ADA291058.pdf
It is suggested that error detection and correction (EDAC) circuitry be considered for all new avionics ... Space Shuttle SEU Rate vs Altitude/Latitude ^.
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https://apps.dtic.mil/sti/pdfs/ADA291058.pdf
It is suggested that error detection and correction (EDAC) circuitry be considered for all new avionics ... Space Shuttle SEU Rate vs Altitude/Latitude ^.
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34
Soft-Error Rate of Advanced SRAM Memories: Modeling and ...
https://www.intechopen.com/chapters/39233
In particular, ultra-scaled memory integrated circuits are more sensitive to single-event-upset (SEU) and digital devices are more subjected to digital single- ...
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https://www.intechopen.com/chapters/39233
In particular, ultra-scaled memory integrated circuits are more sensitive to single-event-upset (SEU) and digital devices are more subjected to digital single- ...
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35
Soft Error Rates in Satellites and Cars - Cadence Community
https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/ser-in-auto-and-space
The failure rate is 1 part per million per year. ... On the satellite, they had an experiment aimed at identifying radiation-induced SEU.
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https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/ser-in-auto-and-space
The failure rate is 1 part per million per year. ... On the satellite, they had an experiment aimed at identifying radiation-induced SEU.
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36
Neutron-energy-dependent Semiconductor Soft Errors ...
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr202106ra1.html
Relationship between the design rule and failure rate. Therefore, it is crucial to design and fabricate semiconductor devices and systems to minimize the SEU ...
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https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr202106ra1.html
Relationship between the design rule and failure rate. Therefore, it is crucial to design and fabricate semiconductor devices and systems to minimize the SEU ...
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37
Soft-Error Resilience Framework For Reliable and Energy ...
https://stars.library.ucf.edu/cgi/viewcontent.cgi?article=7772&context=etd
1.2 Soft Error Rate in Nanometer-scaled VLSI Devices . ... Simulation waveforms for the proposed SEU-resilient latch when a transient.
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https://stars.library.ucf.edu/cgi/viewcontent.cgi?article=7772&context=etd
1.2 Soft Error Rate in Nanometer-scaled VLSI Devices . ... Simulation waveforms for the proposed SEU-resilient latch when a transient.
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38
Microelectronics Reliability
https://www.ihp-microelectronics.com/php_scripts/publications/full_text_final_files/chen-chen-microelectron-reliabil-114-113799-2020-2020.pdf
According to data from various space missions [2,3], the SEU rate ... SEU rate calculation by using only the ACE-SIS ions has the error of.
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https://www.ihp-microelectronics.com/php_scripts/publications/full_text_final_files/chen-chen-microelectron-reliabil-114-113799-2020-2020.pdf
According to data from various space missions [2,3], the SEU rate ... SEU rate calculation by using only the ACE-SIS ions has the error of.
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39
An SEU Hardened 65nm/4T-SRAM Cell for High Reliable ...
https://www.atlantis-press.com/article/25875544.pdf
proposed, but their LETth is still smaller than 10 MeV/mg/cm2, resulting in high SEU error rate caused by high flux particles in the space environment, ...
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https://www.atlantis-press.com/article/25875544.pdf
proposed, but their LETth is still smaller than 10 MeV/mg/cm2, resulting in high SEU error rate caused by high flux particles in the space environment, ...
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40
Heavy Ion Characterization of SEU Mitigation Methods for the ...
https://escies.org/download/webDocumentFile?id=916
With a 10 times lower flux/scrub-cycle ratio the same statistics predicts that 100 times less errors would be detected. 2) User-Logic Upsets. Only one FF error ...
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https://escies.org/download/webDocumentFile?id=916
With a 10 times lower flux/scrub-cycle ratio the same statistics predicts that 100 times less errors would be detected. 2) User-Logic Upsets. Only one FF error ...
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41
Single event upset failure probability evaluation and periodic ...
https://www.jstage.jst.go.jp/article/elex/16/21/16_16.20190544/_pdf
To automatically evaluate the SEU failure probability and identify all the critical elements in a processor, comple- mentary fault injection methods based ...
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https://www.jstage.jst.go.jp/article/elex/16/21/16_16.20190544/_pdf
To automatically evaluate the SEU failure probability and identify all the critical elements in a processor, comple- mentary fault injection methods based ...
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42
Radiation induced soft errors in 16 nm floating gate SLC ...
http://www.skyhighmemory.com/download/1-s2.0-S002627141930633X-main.pdf
Flash memories are related to Single event upset (SEU), Multi-bit upset ... done to compute stress-induced bit error rate (BER) and Failure in Time.
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http://www.skyhighmemory.com/download/1-s2.0-S002627141930633X-main.pdf
Flash memories are related to Single event upset (SEU), Multi-bit upset ... done to compute stress-induced bit error rate (BER) and Failure in Time.
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43
The Rosetta experiment: atmospheric soft error rate testing in ...
https://saardrimer.com/sd410/papers/rosetta.pdf
In this paper we concern ourselves solely with single error events (SEE), or soft errors, or single event upsets. (SEU). Single event latchup (SEL) is not ...
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https://saardrimer.com/sd410/papers/rosetta.pdf
In this paper we concern ourselves solely with single error events (SEE), or soft errors, or single event upsets. (SEU). Single event latchup (SEL) is not ...
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44
Single-Event Upset Technology Scaling Trends of
https://ir.vanderbilt.edu/bitstream/handle/1803/10824/gaspard.pdf?sequence=1&isAllowed=y
errors to ensure system integrity. One area of focus for single-event effects (SEE) in ICs is flip-flop SEU error rates. Flip-flops are generally used as ...
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https://ir.vanderbilt.edu/bitstream/handle/1803/10824/gaspard.pdf?sequence=1&isAllowed=y
errors to ensure system integrity. One area of focus for single-event effects (SEE) in ICs is flip-flop SEU error rates. Flip-flops are generally used as ...
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45
Analysis and Mitigation of SEUs on SRAM-based FPGAs ...
https://indico.esa.int/event/59/contributions/2740/attachments/2254/2607/VERI_Place_Sterpone_final.pdf
Error Rate. Resource classification. Iterations. FPGA configuration memory coordinates of critical SEU. The flow of VERI-Place tool - Analysis ...
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https://indico.esa.int/event/59/contributions/2740/attachments/2254/2607/VERI_Place_Sterpone_final.pdf
Error Rate. Resource classification. Iterations. FPGA configuration memory coordinates of critical SEU. The flow of VERI-Place tool - Analysis ...
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46
Review of Accelerated Testing of SRAMs - SRIM
http://www.srim.org/SER/SERTrends.htm
Problems in the Evaluation of Chip SER (Soft Error Rate) 7 ... Labs[4] demonstrated neutron radiation effects and coined the phrase SEU, single event upset, ...
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http://www.srim.org/SER/SERTrends.htm
Problems in the Evaluation of Chip SER (Soft Error Rate) 7 ... Labs[4] demonstrated neutron radiation effects and coined the phrase SEU, single event upset, ...
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47
Analytical Reliability Estimation of SRAM-based FPGA ...
https://eprints.ucm.es/60831/7/Paper%2019.pdf
For example, the failure rate of FPGA-based designs has been estimated for ... the failure rate of TMR-hardened designs as a function of the SEU rate, the.
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https://eprints.ucm.es/60831/7/Paper%2019.pdf
For example, the failure rate of FPGA-based designs has been estimated for ... the failure rate of TMR-hardened designs as a function of the SEU rate, the.
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48
SEU Mitigation Techniques for Advanced Reprogrammable ...
https://odr.chalmers.se/server/api/core/bitstreams/5224ba42-8ccc-4af3-9674-bece73d64be4/content
In comparing soft error mitigation ... Single Error Correction, Double Error Detection ... Cause of Downtime, Blind Scrubbing (at SEU rate 1/min) .
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https://odr.chalmers.se/server/api/core/bitstreams/5224ba42-8ccc-4af3-9674-bece73d64be4/content
In comparing soft error mitigation ... Single Error Correction, Double Error Detection ... Cause of Downtime, Blind Scrubbing (at SEU rate 1/min) .
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49
SEU Recovery Mechanism for SRAM-Based FPGAs
https://cs.ijs.si/novak/k2012-05.pdf
The efficient implementation of the error-recovery mechanism is very important, since a smaller design has a lower probability of the SEU affecting the correct ...
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https://cs.ijs.si/novak/k2012-05.pdf
The efficient implementation of the error-recovery mechanism is very important, since a smaller design has a lower probability of the SEU affecting the correct ...
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50
Radiation-Induced Soft Errors in Advanced Semiconductor ...
http://web.cecs.pdx.edu/~cgshirl/Documents/2005%20Baumann%20Soft%20Error.pdf
the total observed SEU rate, their occurrence has implications for memory architecture in systems utilizing error correction. [3], [4]. Another type of soft ...
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http://web.cecs.pdx.edu/~cgshirl/Documents/2005%20Baumann%20Soft%20Error.pdf
the total observed SEU rate, their occurrence has implications for memory architecture in systems utilizing error correction. [3], [4]. Another type of soft ...
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51
A generic methodology to compute design ... - Unpaywall
https://unpaywall.org/10.1109%2FDSD.2018.00050
Index Terms—Fault tolerance, FPGA, Single-Event Upset. (SEU), Raw device error rate, Design vulnerability, Simulation- based injection.
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https://unpaywall.org/10.1109%2FDSD.2018.00050
Index Terms—Fault tolerance, FPGA, Single-Event Upset. (SEU), Raw device error rate, Design vulnerability, Simulation- based injection.
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52
Soft error interception latch: double node charge sharing SEU ...
https://ietresearch.onlinelibrary.wiley.com/doi/pdf/10.1049/el.2014.4374
error rate can increase to above acceptable levels. SEU hardening techniques are adopted for soft error tolerance in memory elements, such as the DICE ...
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https://ietresearch.onlinelibrary.wiley.com/doi/pdf/10.1049/el.2014.4374
error rate can increase to above acceptable levels. SEU hardening techniques are adopted for soft error tolerance in memory elements, such as the DICE ...
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53
Soft Error Rate (SER) Prediction Software for IC Design
https://semiwiki.com/x-subscriber/iroc-technologies/1168-soft-error-rate-ser-prediction-software-for-ic-design/
Flash memory is even less sensitive than DRAM to Single Event Upsets (SEU). The FPGA architecture is most sensitive to SER because of the heavy ...
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https://semiwiki.com/x-subscriber/iroc-technologies/1168-soft-error-rate-ser-prediction-software-for-ic-design/
Flash memory is even less sensitive than DRAM to Single Event Upsets (SEU). The FPGA architecture is most sensitive to SER because of the heavy ...
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54
DRAM Errors in the Wild: A Large-Scale Field Study
https://research.google.com/pubs/archive/35162.pdf
Finally, unlike commonly feared, we don't observe any indication that per-DIMM error rates increase with newer generations of DIMMs. 2.
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https://research.google.com/pubs/archive/35162.pdf
Finally, unlike commonly feared, we don't observe any indication that per-DIMM error rates increase with newer generations of DIMMs. 2.
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55
jesd89a | jedec standard
https://www.jedec.org/sites/default/files/docs/jesd89a.pdf
NRL in their 1979 NSREC paper (SEU of DRAMs by neutrons and protons). soft error rate (SER): The rate at which soft errors occur.
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https://www.jedec.org/sites/default/files/docs/jesd89a.pdf
NRL in their 1979 NSREC paper (SEU of DRAMs by neutrons and protons). soft error rate (SER): The rate at which soft errors occur.
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56
Single Event Upset (SEU) in SRAM - IJERA
https://www.ijera.com/papers/Vol3_issue4/MC3421712175.pdf
not address error detection and correction ... event upset (SEU), single event error (SEE), single ... study SEUs, finding that while the rate of upset.
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https://www.ijera.com/papers/Vol3_issue4/MC3421712175.pdf
not address error detection and correction ... event upset (SEU), single event error (SEE), single ... study SEUs, finding that while the rate of upset.
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57
Heavy-Ion Induced Single Event Upsets in Advanced 65 nm ...
https://www.mdpi.com/2079-9292/8/3/323/htm
Creme tools were used to predict the CRAM upset rate, which was merely ... as the calculation of FPGAs' convincible error rates in space are ...
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https://www.mdpi.com/2079-9292/8/3/323/htm
Creme tools were used to predict the CRAM upset rate, which was merely ... as the calculation of FPGAs' convincible error rates in space are ...
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58
Radiation Effects in SSDs - Flash Memory Summit
https://www.flashmemorysummit.com/English/Collaterals/Proceedings/2015/20150812_FF21_Costenaro.pdf
Soft Errors are caused by ionizing ... Upset (SEU) or Transient (SET) ... “Comparison of Accelerated DRAM Soft Error Rates Measured at ...
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https://www.flashmemorysummit.com/English/Collaterals/Proceedings/2015/20150812_FF21_Costenaro.pdf
Soft Errors are caused by ionizing ... Upset (SEU) or Transient (SET) ... “Comparison of Accelerated DRAM Soft Error Rates Measured at ...
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59
Single Event Upset - ELECTRICAL-ENGINEERING.ACADEMY
https://www.electrical-engineering.academy/posts/single-event-upset
However, semiconductor manufacturers manage to effectively limit the SEU error rate by simultaneously densifying the structures on the silicon.
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https://www.electrical-engineering.academy/posts/single-event-upset
However, semiconductor manufacturers manage to effectively limit the SEU error rate by simultaneously densifying the structures on the silicon.
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60
Influence of Orbital Parameters on SEU Rate of Low-Energy ...
https://mdpi-res.com/d_attachment/symmetry/symmetry-12-02030/article_deploy/symmetry-12-02030.pdf?version=1607421919
Keywords: SRAM; single-event upset; on-orbit error rate; low-energy proton. 1. Introduction. With the continuous development of the ...
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https://mdpi-res.com/d_attachment/symmetry/symmetry-12-02030/article_deploy/symmetry-12-02030.pdf?version=1607421919
Keywords: SRAM; single-event upset; on-orbit error rate; low-energy proton. 1. Introduction. With the continuous development of the ...
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61
Experimental study on SEU mitigation in a commercial-off-the ...
https://iihe.ac.be/sites/default/files/thesis-charles-detemmerman-instrumentation-master-2019pdf/thesis-charles-detemmerman-instrumentation-master-2019.pdf
improvement in error rates, while simulations with the Markov chain model indicate that the rate of non-repairable errors has a major impact on reliability.
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https://iihe.ac.be/sites/default/files/thesis-charles-detemmerman-instrumentation-master-2019pdf/thesis-charles-detemmerman-instrumentation-master-2019.pdf
improvement in error rates, while simulations with the Markov chain model indicate that the rate of non-repairable errors has a major impact on reliability.
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62
Soft errors caused by single-event upsets (SEUs) aka. ECC ...
https://community.hiveeyes.org/t/soft-errors-caused-by-single-event-upsets-seus-aka-ecc-ram-absolutely-matters/1891
A single-event upset (SEU), also known as a single-event error (SEE), is a change of state caused by one single ionizing particle (ions, electrons, photons.
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https://community.hiveeyes.org/t/soft-errors-caused-by-single-event-upsets-seus-aka-ecc-ram-absolutely-matters/1891
A single-event upset (SEU), also known as a single-event error (SEE), is a change of state caused by one single ionizing particle (ions, electrons, photons.
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63
INVESTIGATING THE EFFECTS OF SINGLE-EVENT UPSETS ...
https://scholars.unh.edu/cgi/viewcontent.cgi?article=1983&context=thesis
Impact of SEU injection time on upset probability . ... help predict error rates for a particular circuit. Since this thesis uses circuit ...
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https://scholars.unh.edu/cgi/viewcontent.cgi?article=1983&context=thesis
Impact of SEU injection time on upset probability . ... help predict error rates for a particular circuit. Since this thesis uses circuit ...
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64
When your phone gets glitchy, blame cosmic rays - Futurity
https://www.futurity.org/cosmic-rays-seu-electronics-1361892-2/
The error was only detected because it gave the candidate more votes ... An analysis of SEU failure rates for consumer electronic devices ...
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https://www.futurity.org/cosmic-rays-seu-electronics-1361892-2/
The error was only detected because it gave the candidate more votes ... An analysis of SEU failure rates for consumer electronic devices ...
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65
Radiation Experiments on a 28nm Single-Chip Many-core ...
https://hal.inria.fr/hal-01459823/
The SEU error-rate of an application implemented in the device is predicted by combining experimental results with those issued from fault injection ...
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https://hal.inria.fr/hal-01459823/
The SEU error-rate of an application implemented in the device is predicted by combining experimental results with those issued from fault injection ...
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66
A Novel Scheme for Tolerating Single Event/Multiple Bit ...
https://www.youtube.com/watch?v=NaaEfELOw0M
ieeeComputerSociety
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https://www.youtube.com/watch?v=NaaEfELOw0M
ieeeComputerSociety
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67
Neutron energy dependence of semiconductor soft errors was ...
https://group.ntt/en/newsrelease/2020/11/25/201125a.html
4. It was found that the energy dependence of soft error rates was more or less similar for the three FPGAs. The soft error rate increases ...
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https://group.ntt/en/newsrelease/2020/11/25/201125a.html
4. It was found that the energy dependence of soft error rates was more or less similar for the three FPGAs. The soft error rate increases ...
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68
Soft Errors in Electronic Memory – A White Paper
https://tezzaron.com/media/soft_errors_1_1_secure.pdf
Soft error rates for both DRAM and SRAM are expected to rise. ... SEU Single Event Upset: NASA's term for a radiation-induced soft error.
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https://tezzaron.com/media/soft_errors_1_1_secure.pdf
Soft error rates for both DRAM and SRAM are expected to rise. ... SEU Single Event Upset: NASA's term for a radiation-induced soft error.
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69
Semiconductor soft errors - Hokkaido University
https://www.global.hokudai.ac.jp/wp-content/uploads/2020/11/Semiconductor-soft-errors-NTT-Nagoya-Hokkaido-FINAL.pdf
Data on soft error rate dependence on neutron energy are critical ... it is defined as a single event upset (SEU) cross section or it is ...
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https://www.global.hokudai.ac.jp/wp-content/uploads/2020/11/Semiconductor-soft-errors-NTT-Nagoya-Hokkaido-FINAL.pdf
Data on soft error rate dependence on neutron energy are critical ... it is defined as a single event upset (SEU) cross section or it is ...
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70
A Self-Adaptive SEU Mitigation Scheme for Embedded ...
http://repository.essex.ac.uk/32023/7/A_Self-Adaptive_SEU_Mitigation_Scheme_for_Embedded_Systems_in_Extreme_Radiation_Environments.pdf
In simulation, the proposed design can correct more than 99.97% of SEU's errors at the SEU injection rate 6.25 × 104 bit/s. In the neutron radiation.
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http://repository.essex.ac.uk/32023/7/A_Self-Adaptive_SEU_Mitigation_Scheme_for_Embedded_Systems_in_Extreme_Radiation_Environments.pdf
In simulation, the proposed design can correct more than 99.97% of SEU's errors at the SEU injection rate 6.25 × 104 bit/s. In the neutron radiation.
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71
Evaluation of the temperature influence on SEU vulnerability ...
https://hal-lirmm.ccsd.cnrs.fr/lirmm-02008214/document
to the temperature impact on the soft error rate of conventional. 6T-SRAM cells [5][6][7][8]. It is shown that Qcrit is sensibly.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-02008214/document
to the temperature impact on the soft error rate of conventional. 6T-SRAM cells [5][6][7][8]. It is shown that Qcrit is sensibly.
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72
EDAC software implementation to protect small satellites ...
https://upcommons.upc.edu/bitstream/handle/2117/134799/rita-finalproject2.pdf
Keywords software EDAC, error detection and correction (EDAC), ... Although the SEU rate is not high, the scrubbing interval must be low to ...
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https://upcommons.upc.edu/bitstream/handle/2117/134799/rita-finalproject2.pdf
Keywords software EDAC, error detection and correction (EDAC), ... Although the SEU rate is not high, the scrubbing interval must be low to ...
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73
EDR-4705 JEITA SER Testing Guideline
https://home.jeita.or.jp/tsc/std-pdf/EDR-4705.pdf
An SEU in a latch or memory cell that can be correctly rewritten. ... Soft error rate at the ground. no radiation source present other than what is there ...
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https://home.jeita.or.jp/tsc/std-pdf/EDR-4705.pdf
An SEU in a latch or memory cell that can be correctly rewritten. ... Soft error rate at the ground. no radiation source present other than what is there ...
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74
On the Evaluation of SEU Effects on AXI Interconnect ... - NCBI
https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7343411/
To mitigate the SEUs induced errors, several techniques have been proposed, such as periodic refresh of the configuration memory to scrub ...
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https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7343411/
To mitigate the SEUs induced errors, several techniques have been proposed, such as periodic refresh of the configuration memory to scrub ...
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75
Experience with SEU (Single Event Upset) frequency in non ...
https://www.reddit.com/r/FPGA/comments/fvrds5/experience_with_seu_single_event_upset_frequency/
It is estimated that 1 SEU occurs per 256 MB of RAM per month. ... As these sorts of error rates have increased, SRAM memory arrays have ...
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https://www.reddit.com/r/FPGA/comments/fvrds5/experience_with_seu_single_event_upset_frequency/
It is estimated that 1 SEU occurs per 256 MB of RAM per month. ... As these sorts of error rates have increased, SRAM memory arrays have ...
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76
SEU-Induced Persistent Error Propagation in FPGAs
https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=1520&context=etd
Developing a method for cost-effective FPGA functional error mitigation re- quires estimating failure rates for a specific FPGA application.
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https://scholarsarchive.byu.edu/cgi/viewcontent.cgi?article=1520&context=etd
Developing a method for cost-effective FPGA functional error mitigation re- quires estimating failure rates for a specific FPGA application.
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77
Assessing SEU Vulnerability via Circuit-Level Timing Analysis
http://web.eecs.umich.edu/~taustin/papers/WAR05-assess.pdf
simulation infrastructure for estimating soft-error rates of complex computing systems. We permit simulations that react to circuit-level reliability ...
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http://web.eecs.umich.edu/~taustin/papers/WAR05-assess.pdf
simulation infrastructure for estimating soft-error rates of complex computing systems. We permit simulations that react to circuit-level reliability ...
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78
Failure Rate Calculation Method for High Voltage ...
http://power.kyutech.ac.jp/pdf/2017_Erdenebaatar.pdf
The well-known studies have been shown that the cosmic ray penetration in semiconductor device is the failure which basically named “single event upset” (SEU).
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http://power.kyutech.ac.jp/pdf/2017_Erdenebaatar.pdf
The well-known studies have been shown that the cosmic ray penetration in semiconductor device is the failure which basically named “single event upset” (SEU).
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79
Reliability Measurement of FPGA Implementations on ...
https://soc-e.com/wp-content/uploads/2013/07/wif2013_130522_lq.pdf
(λ): Device's failure rate. Failure In Time (FIT) rate: Number of failures that can be ... A bit-flip can be induced (SEU, SET, SEFI, MBU, SEL. -permanent-).
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https://soc-e.com/wp-content/uploads/2013/07/wif2013_130522_lq.pdf
(λ): Device's failure rate. Failure In Time (FIT) rate: Number of failures that can be ... A bit-flip can be induced (SEU, SET, SEFI, MBU, SEL. -permanent-).
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80
Single Event Upsets for Space Shuttle Flights of New General ...
http://klabs.org/DEI/Processor/shuttle/oneill_94.pdf
The GPC's record the time of each soft error the. EDAC finds and downlinks it along with the GPC ... These observed SEU rates, identified as either GCR or.
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http://klabs.org/DEI/Processor/shuttle/oneill_94.pdf
The GPC's record the time of each soft error the. EDAC finds and downlinks it along with the GPC ... These observed SEU rates, identified as either GCR or.
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81
Full article: Measurement of single event effects induced by ...
https://www.tandfonline.com/doi/full/10.1080/00223131.2016.1262294
The non-destructive effects are also known as soft errors, which include single event upset (SEU), single event transient, and single event functional interrupt ...
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https://www.tandfonline.com/doi/full/10.1080/00223131.2016.1262294
The non-destructive effects are also known as soft errors, which include single event upset (SEU), single event transient, and single event functional interrupt ...
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82
Accelerated Soft-Error-Rate (SER) Estimation for ...
https://dl.acm.org/doi/abs/10.1145/3035496
Radiation-induced soft errors have posed an increasing reliability challenge to combinational and sequential circuits in advanced CMOS ...
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https://dl.acm.org/doi/abs/10.1145/3035496
Radiation-induced soft errors have posed an increasing reliability challenge to combinational and sequential circuits in advanced CMOS ...
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83
Single Event Upset Mitigation Techniques for Programmable ...
https://www.inf.ufrgs.br/~fglima/lima_qualifying.pdf
Soft errors called Single Event Upsets (SEU) occur when a charged particle hits ... The error rate can be estimated from LETth, σ.
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https://www.inf.ufrgs.br/~fglima/lima_qualifying.pdf
Soft errors called Single Event Upsets (SEU) occur when a charged particle hits ... The error rate can be estimated from LETth, σ.
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84
SRAM cell design protected from SEU upsets
http://bear.ces.cwru.edu/eecs_projects/iolts08.pdf
of cells leads in increased probability of SEU occur- rence [1, 2, 3, 4, 5]. Soft errors are caused by SEUs carrying excess charge that results in flipping ...
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http://bear.ces.cwru.edu/eecs_projects/iolts08.pdf
of cells leads in increased probability of SEU occur- rence [1, 2, 3, 4, 5]. Soft errors are caused by SEUs carrying excess charge that results in flipping ...
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85
Single Event Upset Testing of Commercial Off-The-Shelf ...
https://www.ulalaunch.com/docs/default-source/evolution/single-event-upset-testing-of-commercial-off-the-shelf-electronics-for-launch-vehicle-applications.pdf
SEU. • Difficulty in developing a single radiation test to simulate ... system-level failure rate estimates found as described in this.
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https://www.ulalaunch.com/docs/default-source/evolution/single-event-upset-testing-of-commercial-off-the-shelf-electronics-for-launch-vehicle-applications.pdf
SEU. • Difficulty in developing a single radiation test to simulate ... system-level failure rate estimates found as described in this.
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86
Diagnostic and Error Correction System for Avionics ... - IMEKO
https://www.imeko.org/publications/tc10-2013/IMEKO-TC10-2013-045.pdf
the Single Event Upset (SEU) has been carried out with the aim of ... [12]G. Asadi, M. B. Tahoori, “Soft Error Rate Estimation and Mitigation for SRAM Based ...
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https://www.imeko.org/publications/tc10-2013/IMEKO-TC10-2013-045.pdf
the Single Event Upset (SEU) has been carried out with the aim of ... [12]G. Asadi, M. B. Tahoori, “Soft Error Rate Estimation and Mitigation for SRAM Based ...
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87
Mitigating Single-Event Upsets Using Cypress's 65-nm ...
https://www.infineon.com/dgdl/Infineon-AN88889_Mitigating_Single-Event_Upsets_Using_Infineon_65-nm_Asynchronous_SRAM-ApplicationNotes-v04_00-EN.pdf?fileId=8ac78c8c7cdc391c017d07389b985c7d
latest generation of SRAMs offers a single-chip solution with on-chip error correcting code (ECC), reducing board space, cost, and design ...
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https://www.infineon.com/dgdl/Infineon-AN88889_Mitigating_Single-Event_Upsets_Using_Infineon_65-nm_Asynchronous_SRAM-ApplicationNotes-v04_00-EN.pdf?fileId=8ac78c8c7cdc391c017d07389b985c7d
latest generation of SRAMs offers a single-chip solution with on-chip error correcting code (ECC), reducing board space, cost, and design ...
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88
Soft Errors in Broadcom Switch Devices
https://docs.broadcom.com/doc/SE-BSD-WP
Single event upset (SEU) is a transitional failure event caused by ... A component with a failure rate of 1 FIT is equivalent to having an ...
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https://docs.broadcom.com/doc/SE-BSD-WP
Single event upset (SEU) is a transitional failure event caused by ... A component with a failure rate of 1 FIT is equivalent to having an ...
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89
14:00 Single Event Upset (SEU): Diagnostic and Error ...
https://www.yumpu.com/en/document/view/21864785/1400-single-event-upset-seu-diagnostic-and-error-correction-
Table 2. FPGA upset rates. EP2C5T: Altera CyclonII (SRAM 90 nm). Configuration. Memory. upset rate. λ C-RAM = 1.08×10 -4.
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https://www.yumpu.com/en/document/view/21864785/1400-single-event-upset-seu-diagnostic-and-error-correction-
Table 2. FPGA upset rates. EP2C5T: Altera CyclonII (SRAM 90 nm). Configuration. Memory. upset rate. λ C-RAM = 1.08×10 -4.
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90
Overview of Single Event Effects - INAOE
https://www.inaoep.mx/seressa2015/archivos/Lunes_16_30%20%20Buchner.pdf
The result of a SEU is that “1” goes to “0” or “0” goes to “1”. ... The following programs may be used to calculate the error rates: – CRÈME-MC. – SPENVIS.
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https://www.inaoep.mx/seressa2015/archivos/Lunes_16_30%20%20Buchner.pdf
The result of a SEU is that “1” goes to “0” or “0” goes to “1”. ... The following programs may be used to calculate the error rates: – CRÈME-MC. – SPENVIS.
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